1. Field of the Invention
The present invention relates to apparatus and methods for transferring data between devices in a computer system. More particularly, the present invention relates to apparatus and methods for maintaining a data stream between devices that handle data differently.
2. Description of the Related Art
In computer systems, there frequently arises a need to transfer data efficiently between devices. Meeting this need may be complicated by various factors.
One complicating factor may be use of different formats--e.g., big-endian versus little-endian--for ordering data. In computer systems where the central processing unit is an Intel 80.times.86 processor, the data format used is typically the little-endian format. Nonetheless, peripheral devices which are based on the big-endian format are sometimes used in the 80.times.86-processor-based computer systems. To function properly, there must be "bridging" circuitry capable of performing little-endian/big-endian data format conversion.
Another complicating factor may be different data handling speeds. It is, for example, difficult to efficiently stream data from a bus in which data is moving at a first speed, to a bus on which data moves at a second, different speed.
Yet another complicating factor may be difficulties that arise in respecting continuity of data. For example, if the total length of an intended transfer of data is unknown; for example, in a case where data is sent in bursts on the one hand, and transferred in a clocked stream on the other; it is difficult to systematically detect and maintain contiguous blocks of data.
Complicating factors such as those set forth above have hampered efforts to design perfectly efficient apparatus and methods for transferring data between devices in computer systems. At the same time, development of devices that reflect improvements in data handling, and that have an associated end to be coupled to preexisting devices, has created many situations in which improved data transfer schemes would be helpful. A prime example of this has arisen in the Fibre Channel/computer interface arena. In that interface it is necessary to bridge data between a Peripheral Component Interconnect ("PCI") bus and a Tachyon System Interface ("TSI") bus. Towards this end, Hewlett Packard has published a "Tachyon TSI to PCI Bus Gasket Application Note," ver. 1.0, the express purpose of which is "to present an intermediate discrete solution to interface Hewlett-Packard's Tachyon Fibre Channel Controller to a standard version 2.0 compliant PCI bus." This application note prescribes a three chip solution, presented with the statement that "t!he interface is not intended to be an end-all solution but is intended to be a starting point for developing a fibre channel solution that includes Tachyon." Thus, it is clear that even Hewlett-Packard itself, the manufacturer of the Tachyon Fibre Channel controller, recognizes the need for, but is not yet satisfied with, TSI/PCI bridges. Bridging TSI and PCI buses requires providing a solution to all three complicating factors mentioned above, that is, data format conversion, speed conversion, and recognition of continuous or contiguous data so that bandwidth can be used efficiently. Although, frankly, several good solutions have been proposed for the big-endian/little-endian conversion requirement, good solutions have not yet been developed for the "speed" and "recognition" problems mentioned above.
In light of the foregoing it is a shortcoming and deficiency of the prior art that there has not heretofore been developed apparatus and methods especially well suited for efficiently bridging certain buses, such as the PCI and TSI buses, especially insofar as speed conversion and respect for continuity of data are important components of such apparatus and methods.